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Chăm sóc sức khỏe- CLB thể thao
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Mô tả công việc
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
Key responsibilities:
Driving all aspects from RTL to GDS including timing and physical sign-off.
Physical Implementation of high speed interface IPs across multiple process technologies.
Close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.
Yêu cầu công việc
Requirements:
Hands-on experience with recent contribution to project tape-outs is a plus.
Methodology driven with strong software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
Familiar with place and route, synthesis,timing and power analysis tools - ICC2, Design Compiler, PrimeTime, Redhawk.
Familiar with physical verification tools and flows - ICV and other PV tools for LVS, DRC, ERC, PERC.
Excellent
communication skills, ability to think and communicate at different levels of abstraction.
Demonstrates master skill at analysis and problem-solving.
Experience with advanced FinFET nodes including low-power design techniques is a plus.
Bachelor or Master Degree in
Electronics Engineering or related majors
Has a strong desire to learn and explore new technologies.
0-2 year(s) physicaldesign experience
Understanding of the full design cycle from RTL to GDSII
Accountability, self-motivation, positive attitude and teamwork.
Understanding of the underlying concepts ofIC design, implementation flows, physical and timing signoff and methodologies for deep submicron design.
Thông tin khác
Thông tin cơ bản
Địa điểm: ➢ Etown 2 Building, 364 Cộng Hòa, Phường 13, Tân Bình, Hồ Chí Minh ( Hồ Chí Minh)
Mức lương:Thỏa thuận
Hạn nộp hồ sơ: [protected info]Chức vụ: Nhân Viên
Hình thức: Đang cập nhật
Kinh nghiệm: Đang cập nhật
Số lượng: Đang Cập Nhật
Trình độ: Đang cập nhật
